CS501 Advance Computer Architecture Midterm Paper 28-Nov-2011
1. What function is performed by the reset operation of a processor and differentiate Hard reset and Soft reset? [5 marks]
2. Write the Structural RTL for the mov instruction for uni-bus data path implementation. mov ra, rb 3 marks
3. Write the Structural RTL for shift right instruction. 2 marks
4. What is the use of "NOP" instruction in pipe lining? 3 marks vuzs
2. Write the Structural RTL for the mov instruction for uni-bus data path implementation. mov ra, rb 3 marks
3. Write the Structural RTL for shift right instruction. 2 marks
4. What is the use of "NOP" instruction in pipe lining? 3 marks vuzs
Some MCQs are as follows
1). LPC: This control signal will enable write of the Program Counter, thus the new,
incremented value can be written into the PC if it is made available on the “in”
bus. Note that the ALSU is assumed to include an INC4 function.
incremented value can be written into the PC if it is made available on the “in”
bus. Note that the ALSU is assumed to include an INC4 function.
2). Anything that interrupts the normal flow of execution of instructions in the
processor is called an exception.
processor is called an exception.
3).What is the size of the memory space that is available to FALCON-A processor?
2^8 bytes
2^16 bytes
2^32 bytes
2^64 bytes
2^8 bytes
2^16 bytes
2^32 bytes
2^64 bytes
4). What is the working of Processor Status Word (PSW)?
To hold the current status of the processor.
To hold the address of the current process
To hold the instruction that the computer is currently processing vuzs
To hold the address of the next instruction in memory that is to be executed
To hold the current status of the processor.
To hold the address of the current process
To hold the instruction that the computer is currently processing vuzs
To hold the address of the next instruction in memory that is to be executed
www.vuzs.net
5). What is the instruction length of the FALCON-E processor?
8 bits
16 bits
32 bits
64 bits
8 bits
16 bits
32 bits
64 bits
6). Which one of the following portions of an instruction represents the operation to be performed?
Address
Instruction code
Opcode
Operand
Address
Instruction code
Opcode
Operand
7). Which instruction is used to store register to memory using relative address?
ld instruction
ldr instruction
lar instruction
str instruction
Helping topic: SRC instruction format.
ld instruction
ldr instruction
lar instruction
str instruction
Helping topic: SRC instruction format.
8). Which type of instructions help in changing the flow of the program as and when required? vuzs.net
Arithmetic
Control
Data transfer
Floating point
Arithmetic
Control
Data transfer
Floating point
9). A MCQ about Power PC
10). which one of the following is 0-address based machine.
11). There was a very long MCQ not remember now but the options are,
VCON
FCON
ACON
LCON
I already found all of them keywords on handouts but there is nothing like this.
VCON
FCON
ACON
LCON
I already found all of them keywords on handouts but there is nothing like this.
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