CS401- Computer Architecture and Assembly Language Programming
McQs collection
Question No: 1 ( M a r k s: 1 ) http://vuzs.net
To transfer control back the RET instruction take
· 1 argument
· 1 argument
· 3 arguments
· No arguments
Question No: 2 ( M a r k s: 1 ) http://vuzs.net
In STOSB instruction SI is decremented or incremented by
4
1
2
3
2
3
Question No: 3 ( M a r k s: 1 ) http://vuzs.net
CMPS instruction subtracts the source location to the destination location.
Destination location always lies in
Destination location always lies in
DS:SI
DS:DI
ES:SI
ES:DI
Question No: 4 ( M a r k s: 1 ) http://vuzs.net
Regarding assembler, which statement is true:
Assembler converts mnemonics to the corresponding OPCODE
Assembler converts OPCODE to the corresponding mnemonics.
Assembler executes the assembly code all at once
Assembler executes the assembly code step by step
Assembler executes the assembly code step by step
Question No: 5 ( M a r k s: 1 ) http://vuzs.net
Iof “BB” is the OPCODE of the instruction which states to “move a constant value to AX register”, the hexadecimal representation (Using little Endian notation) of the instruction “Mov AX,336” (“150” in hexadecimal number system) will be:
0xBB0150
0x5001BB
0x01BB50
0x01BB50
0xBB5001
Question No: 6 ( M a r k s: 1 ) http://vuzs.net
In the instruction MOV AX, 5 the number of operands are
1
2
3
4
Question No: 7 ( M a r k s: 1 ) http://vuzs.net
The maximum parameters a subroutine can receive (with the help of registers) are
6
7
8
9
8
9
Question No: 8 ( M a r k s: 1 ) http://vuzs.net
In assembly the CX register is used normally as a ______________register.
source
counter
index
pointer
Question No: 9 ( M a r k s: 1 ) http://vuzs.net
All the addressing mechanisms in iAPX 8 8 return a number called _ _ _ _ _ _ _ _ _ _ _ _ _ address .
effective
faulty
indirect
direct
Question No: 10 ( M a r k s: 1 ) http://vuzs.net
When a 16 bit number is divided by an 8 bit number, the dividend will be in
AX
BX
CX
DX
Question No: 11 ( M a r k s: 1 ) http://vuzs.net
in Left-Shift-Operation the left most bit _______
will drop
will go into CF
Will come to the right most
will be always 1
Question No: 12 ( M a r k s: 1 ) http://vuzs.net
Suppose the decimal number "35" after shifting its binary two bits to left, the new value becomes _________
35
70
140
17
17
Question No: 13 ( M a r k s: 1 ) http://vuzs.net
When divide overflow occurs processor will be interrupted this type of interrupt is called
Hardware interrupt
Software interrupt
Processor exception
Logical interrupts
Question No: 14 ( M a r k s: 1 ) http://vuzs.net
Which mathematical operation is dominant during the execution of SCAS instruction
Division
Multiplication
Addition
Subtraction
Question No: 15 ( M a r k s: 1 ) http://vuzs.net
After the execution of REP instruction CX will be decremented then which of the
following flags will be affected?
CF
OF
DF
DF
No flags will be affected
Question No: 16 ( M a r k s: 1 ) http://vuzs.net
_________ is one of the reasons due to which string instructions are used in 8088
Efficiency and accuracy
Reduction in code size and accuracy
Reduction in code size and speed
Reduction in code size and efficiency
Question No: 17 ( M a r k s: 1 )
Write any two control instructions.
Question No: 18 ( M a r k s: 1 )
RET instruction take how many arguments
Question No: 19 ( M a r k s: 2 )
Explain the fuction of rotate right (ROR) instruction
Question No: 20 ( M a r k s: 2 )
Describe the PUSH function
Question No: 21 ( M a r k s: 3 )
Write down the names of four segment registers?
Question No: 22 ( M a r k s: 3 )
For what purpose "INT 4" is reserved?
Question No: 23 ( M a r k s: 5 )
Given that [BX+0x0100] BX=0x0100
Ds=0xFFF0
Calculate the physical address
Question No: 1 ( M a r k s: 1 ) http://vuzs.net
The physical address of the stack is obtained by
► SS:SP combination
► SS:SI combination
► SS:SP combination
► ES:BP combination
► ES:SP combination
Question No: 2 ( M a r k s: 1 ) http://vuzs.net
After the execution of instruction “RET ”
► SP is incremented by 2
► SP is incremented by 2
► SP is decremented by 2
► SP is incremented by 1
► SP is decremented by 1
Question No: 3 ( M a r k s: 1 ) http://vuzs.net
The second byte in the word designated for one screen location holds
► Character color on the screen
► The dimensions of the screen
► Character position on the screen
► Character color on the screen
► ASCII code of the character
Question No: 4 ( M a r k s: 1 ) http://vuzs.net
REP will always
► Decrement CX by 1
► Increment CX by 1
► Increment CX by 2
► Decrement CX by 1
► Decrement CX by 2
Question No: 5 ( M a r k s: 1 ) http://vuzs.net
The basic function of SCAS instruction is to
► Compare
► Compare
► Scan
► Sort
► Move data
Question No: 6 ( M a r k s: 1 ) http://vuzs.net
Index registers are used to store __________
►Address
►Data
►Intermediate result
►Address
►Both data and addresses
Question No: 7 ( M a r k s: 1 ) http://vuzs.net
The bits of the _____________ work independently and individually
►flags register
►index register
►base register
►flags register
►accumulator
Question No: 8 ( M a r k s: 1 ) http://vuzs.net
To convert any digit to its ASCII representation
► Add 0x30 in the digit
► Add 0x30 in the digit
► Subtract 0x30 from the digit
► Add 0x61 in the digit
► Subtract 0x61 from the digit
Question No: 9 ( M a r k s: 1 ) http://vuzs.net
When a 32 bit number is divided by a 16 bit number, the quotient is of
► 4 bits
► 32 bits
► 16 bits
► 8 bits
► 4 bits
Question No: 10 ( M a r k s: 1 ) http://vuzs.net
When a 16 bit number is divided by an 8 bit number, the quotient will be in
► AL
► AX
► AL
► AH
► DX
Question No: 11 ( M a r k s: 1 ) http://vuzs.net
Which mathematical operation is dominant during the execution of SCAS instruction
► Division
► Division
► Multiplication
► Addition
► Subtraction
Question No: 12 ( M a r k s: 1 ) http://vuzs.net
If AX contains decimal -2 and BX contains decimal 2 then after the execution of instructions:
CMP AX, BX
JA label
► Zero flag will set
► Jump will be taken
► Zero flag will set
► ZF will contain value -4
► Jump will not be taken
Question No: 13 ( M a r k s: 1 ) http://vuzs.net
The execution of the instruction “mov word [ES : 160], 0x1230” will print a character “0” on the screen at
► First column of second row
► Second column of first row
► First column of second row
► Second column of second row
► First column of third row
Question No: 14 ( M a r k s: 1 ) http://vuzs.net
If the direction of the processing of a string is from higher addresses towards lower addresses then
► DF is cleared
► ZF is cleared
► DF is cleared
► ZF is set
► DF is set
Question No: 15 ( M a r k s: 1 ) http://vuzs.net
The instruction ADC has________ Operand(s) ► 3
► 0
► 1
► 2
► 3
Question No: 16 ( M a r k s: 1 ) http://vuzs.net
Which bit of the attributes byte represents the red component of background color ? ► 3
► 3
► 4
► 5
► 6
Question No: 17 ( M a r k s: 2 )
What is difference between SHR and SAR instructions? SHR
The SHR inserts a zero from the left and moves every bit one position to the right and copy the rightmost bit in the carry flag.
SAR
The SAR shift every bit one place to the right with a copy of the most significant bit left at the most significant place. The bit dropped from the right is caught in the carry basket. The sign bit is retained in this operation.
Question No: 18 ( M a r k s: 2 )
For what purpose "INT 1" is reserved ?Question No: 19 ( M a r k s: 2 )
Define implied operand? It is always in a particular register say the accumulator. It needs to not be mentioned in the instruction.
Q=1:
Which bit of attributes byte represents the blue component of foreground color?
· 0
· 1
· 2
· 3
Q=2:
The clear screen operation initializes the whole block of video memory to:
· 0417
· 0714
· 0741
· 017
Q=3:
When the operand of DIV instruction is of 16 bit then implied dividend will be of
· 64-bit
· 32-bits
· 16-bits
· 8--bits
Q=4
Which of the following is the pair of register used to access memory instring instruction:
· DI and BP
· SI and BP
· DI and SI
· DS and Si
Q=5
A fat32 file system directory entry in DOS consist of how many bytes?
· 16
· 24
· 32
· 64
Q=6:
Which register is generally used to specify the services number of an interrupt?
DX
AX
BX
CX
………………………………………………………………………………………….
Q=7:
In 9 pin db 9 connector ,which pin is assigned to RD(received data)
· 1
· 2
· 3
· 4
Q=8
In case of COM file, maximum length of parameters passed through command line can be……….
· 63 bytes
· 127bytes
· 255 bytes
· 511 bytes
Q=9
We can access the DOS service using;
· Int 0x21
· Int 0x13
· Int 0x 10
· Int 0x 08
Q=10
In 9 pin 9 connector,which pin is assigned to signal ground
· 3
· 4
· 5
· 6
Q=11:
BPB stands for
· Basic parameter block
· Bios precise block
· Basic precise block
· Bios parameter block
Q=12
Int 13-bios disk service “generally uses which register to return the error flag?
· CF
· DL
· AH
· AL
Q=13:
The first sector on the hard disk contains the
· Hard disk size
· Partition table
· Data size
· Sector size
Q=14
Operating system organize data in the form of
· Folder
· Batch file
· File
· None of above
………
Q=15
In 9 pin db 9 connector, which pin is assigned to TD(transmitted data)
· 1
· 2
· 3
· 4
Q=16”
Device derive can be divided into ----------major categories.
· 5
· 4
· 3
· 2
1. BL contains 5 decimal then after right shift , BL will become
· 3
· 2.5
· 5
· 10
2. 8 * 16 font is stored in ________ bytes.
· 3
· 4
· 8
· 16
3. In DOS input buffer , number of characters actually read on return is stored in
· First byte
· Second byte
· Third byte
· Fourth byte
4. IRQ 0 has priority
· Low
· High
· Highest
· Medium
5. Thread registration code initialize PCB and add to linked list so that _____ will give it turn.
· Assembler
· Linker
· Scheduler
· Debugger
6. Traditional calling conventions are in ______ number
· 1
· 2
· 3
· 4
7. VESA VEB 2.0 is standard for
· High Resolution Mode
· Low Resolution Mode
· Very High Resolution Mode
· Medium Resolution Mode
8. To clear direction flag which instruction is used
· Cld
· Clrd
· Cl df
· Clr df
9. In STOSW instruction , When DI is cleared , SI is
· Incremented by 1
· Incremented by 2
· Decremented by 1
· Decremented by 2
10. Interrupt that is used in debugging with help of trap flag is
· INT 0
· INT 1
· INT 2
· INT 3
11. INT for arithmetic overflow is
· INT 1
· INT 2
· INT 3
· INT 4
12. IRQ referred as
· Eight Input signals
· One Input signal
· Eight Output signals
· One output signal
13. IRQ for keyboard is ____1_____
14. IRQ for sound card is ______5_______
15. IRQ for floppy disk is ______6_______
16. IRQ with highest priority is
· Keyboard IRQ
· Timer IRQ
· Sound Card
· Floppy Disk
17. Pin for parallel port ground is
· 10-18
· 18-25
· 25-32
· 32-39
18. The physical address of Interrupt Descriptor Table (IDT) is stored in
· GDTR
· IDTR
· IVT
· IDTT
19. Execution of “RET 2” results in?
20. CX register is
· Count register
· Data register
· Index register
· Base register
21. OUT instruction uses __AX_____ as source register.
22. IN DB-9 connector the Data Set ready pin is at
· 5
· 6
· 7
· 8
23. If two devices uses same IRQ then there is
· IRQ collision
· IRQ conflict
· IRQ drop
24. VESA organizes 16 bit color for every pixel in ratio
· 5:5:5
· 5:6:5
· 6:5:6
· 5:6:7
25. Division by zero is done by which interrupt.
Interrupt 0.
………………………………………………………………………………………
Question No: 1 ( M a r k s: 1 ) http://vuzs.net
After the execution of SAR instruction ► The msb is replaced by a 0
► The msb is replaced by 1
► The msb retains its original value
► The msb is replaced by the value of CF
Question No: 2 ( M a r k s: 1 ) http://vuzs.net
RETF will pop the offset in the ► BP
► IP
► SP
► SI
Question No: 3 ( M a r k s: 1 ) http://vuzs.net
The routine that executes in response to an INT instruction is called ► ISR
► IRS
► ISP
► IRT
Question No: 4 ( M a r k s: 1 ) http://vuzs.net
The first instruction of “COM” file must be at offset: ► 0x0010
► 0x0100
► 0x1000
► 0x0000
Question No: 5 ( M a r k s: 1 ) http://vuzs.net
“Far” jump is not position relative but is _______________ ► memory dependent
► Absolute
► temporary
► indirect
Question No: 6 ( M a r k s: 1 ) http://vuzs.net
Only ___________ instructions allow moving data from memory to memory. ► string
► word
► indirect
► stack
Question No: 7 ( M a r k s: 1 ) http://vuzs.net
After the execution of instruction “RET 2” ► SP is incremented by 2
► SP is decremented by 2
► SP is incremented by 4
► SP is decremented by 4
Question No: 8 ( M a r k s: 1 ) http://vuzs.net
DIV instruction has ► Two forms
► Three forms
► Four forms
► Five forms
Question No: 9 ( M a r k s: 1 ) http://vuzs.net
When the operand of DIV instruction is of 16 bits then implied dividend will be of ► 8 bits
► 16 bits
► 32 bits
► 64 bits
Question No: 10 ( M a r k s: 1 ) http://vuzs.net
After the execution of MOVS instruction which of the following registers are updated ► SI only
► DI only
► SI and DI only
► SI, DI and BP only
Question No: 11 ( M a r k s: 1 ) http://vuzs.net
In 8088 architecture, whenever an element is pushed on the stack ► SP is decremented by 1
► SP is decremented by 2
► SP is decremented by 3
► SP is decremented by 4
Question No: 12 ( M a r k s: 1 ) http://vuzs.net
When a very large number is divided by very small number so that the quotient is larger than the space provided, this is called ► Divide logical error
► Divide overflow error
► Divide syntax error
► An illegal instruction
Question No: 13 ( M a r k s: 1 ) http://vuzs.net
In the word designated for one screen location, the higher address contains ► The character code
► The attribute byte
► The parameters
► The dimensions
Question No: 14 ( M a r k s: 1 ) http://vuzs.net
Which of the following options contain the set of instructions to open a window to the video memory? ► mov AX, 0xb008
mov ES, AX
► mov AX, 0xb800
mov ES, AX
► mov AX, 0x8b00
mov ES, AX
► mov AX, 0x800b
mov ES, AX
Question No: 15 ( M a r k s: 1 ) http://vuzs.net
In a video memory, each screen location corresponds to ► One byte
► Two bytes
► Four bytes
► Eight bytes
Question No: 16 ( M a r k s: 1 ) http://vuzs.net
The execution of the instruction “mov word [ES : 0], 0x0741” will print character “A” on screen , background color of the screen will be ► Black
► White
► Red
► Blue
Question No: 1 ___( M a r k s: 1 ) http://vuzs.net
Which of the following is not true about registers?
1. Their operation is very much like memory
2. Intermediate results may also be stored in registers.
3. They are also called scratch pad ram
4. None of given options.
Question No: 2 ___( M a r k s: 1 ) http://vuzs.net
move [bp], al moves the one byte content of the AL register to the address contained in
BP register in the current
1. Stack segment
2. Code segment
3. Data segment
4. Extra segment
Question No: 3 ( M a r k s: 1 ) http://vuzs.net
In a rotate through carry right (RCR) instruction applied on a 16 bit word
Effectively there is
1. 16 bits rotation
2. 1 bit rotation
3. 17 bits rotation
4. 8 bits rotation
Question No: 4__ ( M a r k s: 1 ) - Please
choose one The 8088 stack works on
1. Word sized elements
2. Byte sized elements
3. Double sized element
4. Nible sized element
Question No: 5 ( M a r k s: 1 ) - Please
choose one
An 8 x 16 font is stored in………..Bytes
1. 2
2. 4
3. 8
4. 16
Question No: 6 ( M a r k s: 1 ) - Please
INT 10 is used for…………………services.
1. RAM
2. Disk
3. BIOS video
4. DOS video
Question No: 7 __ ( M a r k s: 1 ) http://vuzs.net
Priority of IRQ 0 interrupt is
1. medium
2. high
3. highest
4. low
Question No: 8 __ ( M a r k s: 1 ) http://vuzs.net
Threads can have function calls, parameters and ___________variables.
1. global
2. local
3. legal
4. illegal
Question No: 9 __ ( M a r k s: 1 ) - Please choose
one How many prevalent calling conventions do……….exist
1. 1
2. 2
3. 3
4. 4
Question No: 10 ( M a r k s: 1 ) - Please choose
one In 9pin DB 9 DSR is assigned on pin number
1. 4
2. 5
3. 6
4. 7
Question No: 11
( M a r k s: 1 ) - Please
choose one In 9pin DB 9 CTS is assigned on pin
number
1. 6
2. 7
3. 8
4. 9
Question No: 12__ ( M a r k s: 1 ) http://vuzs.net
In 9pin DB 9 CD is assigned on pin number
1. 1
2. 2
3. 3
4. 4
Question No: 13__ ( M a r k s: 1 ) http://vuzs.net
In 9pin DB 9 RD is assigned on pin number
· 1
· 2
· 3
· 4
Question No: 14 __ ( M a r k s: 1 ) http://vuzs.net
in device attribute word which of the following bit decides whether it is a cha rater
1. device or a block device
2. Bit 12 Bit 13
3. Bit 14
4. Bit 15
Question No: 15__ ( M a r k s: 1 ) http://vuzs.net
Video servioces are classified into ___________broad categories
· 2
· 3
· 4
· 5
Question No: 16 ( M a r k s: 1 ) - Please choose
one In STOSB instruction, when DF is clear, SI
is
1. Incremented by 1
2. Incremented by 2
3. Decremented by 1
4. Decremented by 2
Question No: 17 ( M a r k s: 1 ) http://vuzs.net The
process of sending signals back and forth is called
1. Activity
2. Hand-shaking
3. Interruption
4. Time clicking
Question No: 18 ( M a r k s: 1 ) http://vuzs.net
which of the following is a special type of interrupt that returns to the
same instruction instead of the next instruction
1. Divide overflow interrupt
2. Debug interrupt
3. Arithmetic overflow interrupt
4. Change of sign interrupt
Question No: 19 ___( M a r k s: 1 ) http://vuzs.net
Which of the following IRQs is derived by a timer device?
1. IRQ 0
2. IRQ 1
3. IRQ 2
4. IRQ 3
Question No: 20 __ ( M a r k s: 1 ) http://vuzs.net
Which of the following interrupts is used for Arithmetic overflow
1. INT 1
2. INT 2
3. INT 3
4. INT 4
Question No: 21 __ ( M a r k s: 1 ) http://vuzs.net
Which of the following IRQs is connected to serial port COM 2?
1. IRQ 0
2. IRQ 1
3. IRQ 2
4. IRQ 3
Question No: 22 __ ( M a r k s: 1 ) - Please
choose one
An End of Interrupt (EOI) signal is sent by
1. Handler
2. Processor
3. IRQ
4. PIC
Question No: 23 __ ( M a r k s: 1 ) http://vuzs.net
The source registers in OUT is
1. AL or AX
2. BL or BX
3. CL or CX
4. DL or DX
Question No: 24 ( M a r k s: 1 ) http://vuzs.net
In programmable interrupt controller which of the following ports is used for selectively
enabling or disabling interrupts
1. 19
2. 20
3. 21
4. 22
Question No: 25 ( M a r k s: 1 ) http://vuzs.net
The number of pins in a parallel port connector
are?
1. 25
2. 30
3. 35
Question No: 26 ( M a r k s: 1 ) http://vuzs.net
Which of the following pins of a parallel port connector are grounded?
1. 10-18
2. 18-25
3. 25-32
4. 32-39
Question No: 27 __ ( M a r k s: 1 ) http://vuzs.net
Suppose a decimal number 35 when its binary is shifted to write two places the
new number will become
1. 35
2. 70
3. 140
4. 17
Question No: 28 __ ( M a r k s: 1 ) http://vuzs.net
A 32bit address register can access upto ............................of memory so memory
access has increased a lot.
1. 2GB
2. 4GB
3. 6GB
4. 8GB
Question No: 29 __ ( M a r k s: 1 ) http://vuzs.net
In NASM an imported symbol is declared with the ................................while and
exported symbol is declared with the ......................................................................
1. Global directive, External directive
2. External directive, Global directive
3. Home Directive, Foreign Directive
4. Foreign Directive, Home Directive
Question No: 30 ( M a r k s: 1 ) - Please choose
one Single step interrupt is
1. Hardware interrupt
2. Like divide by zero interrupt
3. Like divide by 1 interrupt
4. Software interrupt
Question No: 31 __ ( M a r k s: 1 )
Which services are gained bi INT 0x16
Solution:
Hardware interrupt
Like divide by zero interrupt
Like divide by 1 interrupt
Software interrupt
Question No: 32 ( M a r k s: 1
Give the name of any one VESA servic
· Hardware interrupt
· Like divide by zero interrupt
· Like divide by 1 interrupt
· Software interrupt
Question No: 33 ( M a r k s: 2 )
INT 14 - SERIAL - READ CHARACTER FROM PORT
By using above port what do AH,AL and DX shows here?
· Hardware interrupt
· Like divide by zero interrupt
· Like divide by 1 interrupt
· Software interrupt
Question No: 34 ( M a r k s: 2 )
What do these instructions do ? write your answer in single line.
mov cx, 0xffff
loop $
· Hardware interrupt
· Like divide by zero interrupt
· Like divide by 1 interrupt
· Software interrupt
Question No: 35 ( M a r k s: 3 )
Define the protected mode
Solution:
· Hardware interrupt
· Like divide by zero interrupt
· Like divide by 1 interrupt
· Software interrupt
Question No: 36 ( M a r k s: 3 )
Write a program in assembly language to disable keyboard interrupt using PIC
mask register
Hint: Only five instructions are needed
Solution:
· Hardware interrupt
· Like divide by zero interrupt
· Like divide by 1 interrupt
· Software interrupt
Question No: 37 ( M a r k s: 3 )
Read the following passage carefully and fill the blanks with proper words.
Note: Don't rewrite the passage just write the words in same order.
"BIOS sees the disks as a combination of sectors, tracks, and................., as a
raw storage device without concern to whether it is reading a file or directory.
................. provides the simplest and most powerful interface to the storage
medium. However this raw storage is meaningless to the user who needs to
store his files and organize them into..................... . "
Solution:
· Hardware interrupt
· Like divide by zero interrupt
· Like divide by 1 interrupt
· Software interrupt
Question No: 1 ( M a r k s: 1 )
http://vuzs.net
Sun SPARC Processor has a fixed ______________ instruction size.
1. 16bit
2. 32bit
3. 64bit
4. 20bit
Question No: 2 ( M a r k s: 1 )
http://vuzs.net
When the subprogram finishes, the ____________________ retrieves the return address from the stack and transfers control to that location.
1. RET instruction
2. CALL instruction
3. POP instruction
4. Jump instruction
Question No: 3 ( M a r k s: 1 )
http://vuzs.net
A 32 bit address register can access upto __________ of memory.
· 1 GB
· 6 GB
· 4 GB
· 2 GB
Question No: 4 ( M a r k s: 1 )
http://vuzs.net
The value of a segment register when the processor is running under protected mode is called
1. segment descriptor
2. segment selector
3. global descriptor table
4. protected register
Question No: 5 ( M a r k s: 1 )
http://vuzs.net
FS and GS are two ___________________ in protected mode.
1. segment registers
2. segment selectors
3. stack pointers
4. register pointers
Question No: 6 ( M a r k s: 1 )
http://vuzs.net
IRQ 0 interrupt have _______________ priority
1. low
2. medium
3. highest
4. lowest
Question No: 7 ( M a r k s: 1 )
http://vuzs.net
IDT stands for ______________________.
1. interrupt descriptor table
2. individual descriptor table
3. inline data table
4. interrupt descriptor table
Question No: 8 ( M a r k s: 1 )
http://vuzs.net
Every bit of line status in serial port conveys _____________ information.
1. different
2. same
3. partial
4. full
Question No: 9 ( M a r k s: 1 )
http://vuzs.net
There are total _______________ bytes in a standard floppy disk.
1. 1444k
2. 1440k
3. 1280k
4. 2480k
Question No: 10 ( M a r k s: 1 )
http://vuzs.net
An 8x16 font is stored in _________________ bytes.
· 8
· 16
· 4
· 20
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. Serial Port is also accessible via I/O ports , COM 1 is accessible via ports 3F8-3FF while COM 2 is accessible via 2F8 -2FF.
The first register at 3F8 is the Transmitter holding register if written to and the receiver buffer register if read from.
Other register of our interest include 3F9 whose Bit 0 must be set to enable received data available interrupt and Bit 1 must be set to enable transmitter holding register empty interrupt.
(Transmitter, COM 1, I/O ports , COM2. bit 0 , Buffer , 3FA)
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Question # 1
There are three busses to communicate the processor and memory named as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Correct Option : 4 From : Lecture 1
Question # 2
The address bus is unidirectional and address always travels from processor to memory.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 1
Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Correct Option : 3 From : Lecture 1
Question # 4
Control bus________
1) : is Not Important.
2) : is Important .
3) : bidirectional.
4) : unidirectional .
Correct Option : 3 From : Lecture 1
Question # 5
A memory cell is an n-bit location to store data, normally ________also called a byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Correct Option : 2 From : Lecture 1
Question # 6
The number of bits in a cell is called the cell width.______________ define the memory completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Correct Option : 1 From : Lecture 1
Question # 7
for memory we define two dimensions. The first dimension defines how many __________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Correct Option : 1 From : Lecture 1
Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal
2) : Best and simplest
3) : first
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 9
Control bus is only the mechanism. The responsibility of sending the appropriate signals on the control bus to the memory is of the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 10
In “total: dw 0 ” Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Correct Option : 3 From : Lecture 10
Question # 11
| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 3 From : Lecture 10
Question # 12
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 1 From : Lecture 10
Question # 13
ADC has _________ operands.
1) : two
2) : three
3) : Five
4) : Zero
Correct Option : 2 From : Lecture 10
Question # 14
The basic purpose of a computer is to perform operations, and operations need ____________.
1) : order
2) : nothing
3) : operands
4) : bit
Correct Option : 3 From : Lecture 2
Question # 15
Registers are like a scratch pad ram inside the processor and their operation is very much like normal______________.
1) : Number
2) : opreations
3) : memory cells
4) : None of the Given
Correct Option : 3 From : Lecture 2
Question # 16
There is a central register in every processor called the _______ and The word size of a processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
3) : accumulator, Address Bus
4) : accumulator,memory
Correct Option : 1 From : Lecture 2
Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Correct Option : 2 From : Lecture 2
Question # 18
“The program counter holds the address of the next instruction to be _____________”
1) : executed.
2) : called
3) : deleted
4) : copy
Correct Option : 1 From : Lecture 2
Question # 19
There are _____ types of “instruction groups”
1) : 4
2) : 5
3) : 3
4) : 2
Correct Option : 1 From : Lecture 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 2
Question # 21
“mov” instruction is related to the _______ *****.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Special Instructions
Correct Option : 2 From : Lecture 2
Question # 22
______________allow changing specific processor behaviors and are used to play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Correct Option : 1 From : Lecture 2
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Correct Option : 3 From : Lecture 2
Question # 24
The __________ of a processor means the organization and functionalities of the registers it contains and the instructions that are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
4) : None of the Given
Correct Option : 2 From : Lecture 2
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
4) : None of the Given
Correct Option : 1 From : Lecture 2
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lecture 3
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Correct Option : 1 From : Lecture 3
Question # 28
AX means we are referring to the extended 16bit “A” register. Its upper and lower byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Correct Option : 1 From : Lecture 3
Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Correct Option : 4 From : Lecture 3
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
4) : None of the Given
Correct Option : 2 From : Lecture 3
Question # 31
The D of DX stands for Destination as it acts as the destination in _____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Correct Option : 1 From : Lecture 3
Question # 32
The C of CX stands for Counter as there are certain instructions that work with an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Correct Option : 3 From : Lecture 3
Question # 33
_________are the index registers of the Intel architecture which hold address of data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Correct Option : 4 From : Lecture 3
Question # 34
In Intel IAPX88 architecture ___________ is the special register containing the address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Correct Option : 3 From : Lecture 3
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Correct Option : 1 From : Lecture 3
Question # 36
___________is also a memory pointer containing the address in a special area of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Correct Option : 2 From : Lecture 3
Question # 37
____________is bit wise significant and accordingly each bit is named separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Correct Option : 4 From : Lecture 3
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this extra bit that won’t fit in the target register is placed in the __________where it can be used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Correct Option : 1 From : Lecture 3
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 40
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 41
Operation code “ add ax, bx ” ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Correct Option : 3 From : Lecture 3
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Correct Option : 1 From : Lecture 4
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with _______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Correct Option : 2 From : Lecture 4
Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
4) : None of the Given
Correct Option : 1 From : Lecture 4
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______ four bits zero = 20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Correct Option : 4 From : Lecture 4
Question # 46
When adding two 20bit Addresses a carry if generated is dropped without being stored anywhere and the phenomenon is called address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Correct Option : 1 From : Lecture 4
Question # 47
segments can only be defined a 16byte boundaries called _____________ boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Correct Option : 1 From : Lecture 4
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This is called _____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Correct Option : 2 From : Lecture 4
Question # 49
“db num1” size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
Correct Option : 1 From : Lecture 5
Question # 50
“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx _________________________________
5------------int 0x21
6------------
7------------num1: dw 5
8------------num2: dw 10
Comments for the 4 are :
1) : No comments Will be
2) : ; accumulate sum in add
3) : ; accumulate sum in ax
4) : ; accumulate sum in Bx
Correct Option : 3 From : Lecture 5
Question # 51
In “ mov ax, bx ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 4 From : Lecture 5
Question # 52
In “mov ax, [bx] ” is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Correct Option : 1 From : Lecture 5
Question # 53
In “mov ax, 5 ” is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Correct Option : 1 From : Lecture 6
Question # 54
In “ mov ax, [num1+bx] ” is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Correct Option : 4 From : Lecture 7
Question # 55
“base + offset addressing ” gives This number which came as the result of addition is called the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option : 3 From : Lecture 7
Question # 56
“mov ax, [cs:bx]” associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
4) : None of the Given
Correct Option : 2 From : Lecture 7
Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Correct Option : 2 From : Lecture 7
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
Correct Option : 2 From : Lecture 7
Question # 59
In “ mov [1234], al ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 3 From : Lecture 8
Question # 60
In “ mov [SI], AX ” is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Correct Option : 3 From : Lecture 8
Question # 61
In “ mov ax, [bx - Si] ” is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Correct Option : 4 From : Lecture 8
Question # 62
In “ mov ax, [BL] ” there is error i.e. __________
1) : Address must be 16bit
2) : Address must be 8bit
3) : Address must be 4bit
4) : 8 bit to 16 bit move illegal
Correct Option : 4 From : Lecture 8
Question # 63
In “ mov ax, [SI+DI] ” there is error i.e. __________
1) : Two indexes can’t use as Memory Address
2) : index can’t use as Memory Address
3) : I don't Know
4) : None of the Given
Correct Option : 1 From : Lecture 8
Question # 64
In JNE and JNZ there is difference for only _____________;
1) : Programmer or Logic
2) : Assembler
3) : Debugger
4) : IAPX88
Correct Option : 1 From : Lecture 9
Question # 65
JMP is Instruction that on executing take jump regardless of the state of all flags is called__________
1) : Jump
2) : Conditional jump
3) : Unconditional jump
4) : Stay
Correct Option : 3 From : Lecture 9
Question # 66
When result of the source subtraction from the destination is zero, zero flag is set i.e. ZF=1
its mean that;
1) : DEST = SRC
2) : DEST != SRC
3) : DEST < SRC
4) : DEST > SRC
Correct Option : 1 From : Lecture 9
Question # 67
When an unsigned source is subtracted from an unsigned destination and the destination is smaller, borrow is needed which sets the ____________.
1) : carry flag i.e CF = 0
2) : carry flag i.e CF = 1
3) : Carry Flag + ZF=1
4) : None of the Given
Correct Option : 2 From : Lecture 9
Question # 68
In the case of unassigned source and destination when subtracting and in the result ZF =1 OR CR=1 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST ? USRC
4) : DEST > SRC
Correct Option : 3 From : Lecture 9
Question # 69
In the case of unassigned source and destination when subtracting and in the result ZF =0 AND CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST > USRC
Correct Option : 4 From : Lecture 9
Question # 70
In the case of unassigned source and destination when subtracting and in the result CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST ? USRC
Correct Option : 4 From : Lecture 9
Question # 71
______This jump is taken if the last arithmetic operation produced a zero in its destination. After a CMP it is taken if both operands were equal.
1) : Jump if zero(JZ)/Jump if equal(JE)
2) : Jump if equal(JE)
3) : Jump if zero(JZ)
4) : No Jump fot This
Correct Option : 1 From : Lecture 9
Question # 72
_______This jump is taken after a CMP if the unsigned source is smaller than or equal to the unsigned destination.
1) : JBE(Jump if not below or equal)
2) : JNA(Jump if not above)/JBE(Jump if not below or equal)
3) : JNA(Jump if not above)
4) : No Jump fot This
Correct Option : 2 From : Lecture 9
Question # 1
Numbers of any size can be added using a proper combination of __________.
1) : ADD and ADC
2) : ABD and ADC
3) : ADC and ADC
4) : None of the Given
Correct Option : 1 From : Lecture 11
Question # 2
Like addition with carry there is an instruction to subtract with borrows called____________.
1) : SwB
2) : SBB
3) : SBC
4) : SBBC
Correct Option : 2 From : Lecture 11
Question # 3
if “and ax, bx” instruction is given, There are _____________ operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12
Question # 4
____________can be used to check whether particular bits of a number are set or not.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 1 From : Lecture 12
Question # 5
__________can also be used as a masking operation to invert selective bits.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 3 From : Lecture 12
Question # 6
Masking Operations are Selective Bit ______________________
1) : Clearing, XOR, Inversion and Testing
2) : Clearing, Setting, Inversion and Testing
3) : Clearing, XOR, AND and Testing
4) : None of the Given
Correct Option : 2 From : Lecture 12
Question # 7
The ____________ instruction allows temporary diversion and therefore reusability of code.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 1 From : Lecture 13
Question # 8
CALL takes a label as _____________ and execution starts from that label,
1) : argument
2) : Lable
3) : TXt
4) : Register
Correct Option : 1 From : Lecture 13
Question # 9
When the __________instruction is encountered and it takes execution back to the instruction following the CALL.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 2 From : Lecture 13
Question # 10
_______________________ Both the instructions are commonly used as a pair, however technically they are independent in their operation.
1) : RET and ADC
2) : Cal and SSb
3) : CALL and RET
4) : ADC and SSB
Correct Option : 3 From : Lecture 13
Question # 11
The CALL mechanism breaks the thread of execution and does not change registers, except ____________.
1) : SI
2) : IP
3) : DI
4) : SP
Correct Option : 2 From : Lecture 13
Question # 12
Stack is a ______ that behaves in a first in last out manner.
1) : Program
2) : data structure
3) : Heap
4) : None of the Given
Correct Option : 2 From : Lecture 14
Question # 13
If ____________ is not available, stack clearing by the callee is a complicated process.
1) : CALL
2) : SBB
3) : RET n
4) : None of the Given
Correct Option : 3 From : Lecture 14
Question # 14
When the stack will eventually become full, SP will reach 0, and thereafter wraparound producing unexpected results. This is called stack ________
1) : Overflow
2) : Leakage
3) : Error
4) : Pointer
Correct Option : 1 From : Lecture 14
Question # 15
The pop operation makes a copy from the top of the stack into its_______________.
1) : Register
2) : operand
3) : RET n
4) : Pointer
Correct Option : 2 From : Lecture 14
Question # 16
_______________decrements SP (the stack pointer) by two and then transfers a word from the source operand to the top of stack
1) : PUSH
2) : POP
3) : CALL
4) : RET
Correct Option : 1 From : Lecture 14
Question # 17
POP transfers the word at the current top of stack (pointed to by SP) to the destination operand and then __________ SP by two to point to the new top of stack.
1) : increments
2) : dcrements
3) : ++
4) : --
Correct Option : 1 From : Lecture 14
Question # 18
The trick is to use the ________and ___________operations and save the callers’ value on the stack and recover it from there on return.
1) : POP, ADC
2) : CALL, RET
3) : CALL, RET n
4) : PUSH, POP
Correct Option : 4 From : Lecture 14
Question # 19
To access the arguments from the stack, the immediate idea that strikes is to __________ them off the stack.
1) : PUSH
2) : POP
3) : CALL
4) : Rrgister
Correct Option : 2 From : Lecture 15
Question # 20
push bp
we are ________________
1) : sending bp copy to stack
2) : making bp copy from stack
3) : pushing bp on the stack
4) : doing nothing
Correct Option : 3 From : Lecture 15
Question # 21
Local Variables means variables that are used within the ___________________
1) : Subroutine
2) : Program
3) : CALL
4) : Label
Correct Option : 1 From : Lecture 15
Question # 22
Standard ASCII has 128 characters with assigned numbers from ________.
1) : 1to 129
2) : 0 to 127
3) : 0 to 128
4) : None of the Given
Correct Option : 2 From : Lecture 16
Question # 23
When _______ is sent to the VGA card, it will turn pixels on and off in such a way that a visual representation of ‘A’ appears on the screen.
1) : 0x60
2) : 0x90
3) : 0x30
4) : 0x40
Correct Option : 4 From : Lecture 16
Question # 24
Which bit is refer to the Blinking of foreground character
1) : 6
2) : 7
3) : 5
4) : 3
Correct Option : 2 From : Lecture 16
Question # 25
Which bit is refer to the Intensity component of foreground color
1) : 4
2) : 5
3) : 3
4) : 7
Correct Option : 3 From : Lecture 16
Question # 26
Which bit is refer to the Green component of background color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 2 From : Lecture 16
Question # 27
Which bit is refer to the Green component of foreground color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 1 From : Lecture 16
Question # 28
String can be indicate bye given
1) : db 0x61, 0x61, 0x63
2) : db 'a', 'b', 'c'
3) : db 'abc'
4) : All of the above
Correct Option : 4 From : Lecture 16
Question # 29
The first form divides a 32bit number in DX:AX by its 16bit operand and stores the ___________ quotient in AX
1) : 16bit
2) : 17bit
3) : 32bit
4) : 64bit
Correct Option : 1 From : Lecture 17
Question # 30
The ___________ (division) used in the process is integer division and not floating point division.
1) : DIV instruction
2) : ADC instruction
3) : SSB instruction
4) : DIVI instruction
Correct Option : 1 From : Lecture 17
Question # 31
______________(multiply) performs an unsigned multiplication of the source operand and the accumulator.
1) : Multi
2) : DIV
3) : MUL
4) : Move
Correct Option : 3 From : Lecture 18
Question # 32
The desired location on the screen can be calculated with the following formulae.
1) : location = ( hypos * 80 + SP ) * 3
2) : location = ( hypos * 80 + slocation ) * 2
3) : location = ( hypos * 80 + epos ) * 2
4) : None of the Given
Correct Option : 3 From : Lecture 18
Question # 33
To play with string there are 5 instructions that are __________
1) : STOS, LODS, CMPS, SCAS, and MOVS
2) : MUL, DIV, ADD, ADC and MOVE
3) : SSB, ADD, CMPS, ADC, and MOVS
4) : None of the Given
Correct Option : 1 From : Lecture 18
Question # 34
_______transfers a byte or word from register AL or AX to the string element addressed by ES:DI and updates DI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 2 From : Lecture 18
Question # 35
____________ transfers a byte or word from the source location DS:SI to AL or AX and updates SI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 1 From : Lecture 18
Question # 36
_______compares a source byte or word in register AL or AX with the destination string element addressed by ES: DI and updates the flags.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 3 From : Lecture 18
Question # 37
____________ repeat the following string instruction while the zero flag is set and REPNE or REPNZ repeat the following instruction while the zero flag is not set.
1) : REP or REPZ
2) : REPE or REPZ
3) : REPE or RPZ
4) : RPE or REPZ
Correct Option : 2 From : Lecture 18
Question # 38
LES loads ______________
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 1 From : Lecture 20
Question # 39
LDS loads_______.
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 2 From : Lecture 20
Question # 40
REP allows the instruction to be repeated ____________ times allowing blocks of memory to be copied.
1) : DX
2) : CX
3) : BX
4) : AX
Correct Option : 2 From : Lecture 20
Question # 41
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question # 42
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question # 43
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 44
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
Correct Option : 2 From : Lecture 22
Question # 1
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question # 2
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question # 3
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 4
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
There are three busses to communicate the processor and memory named as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Correct Option : 4 From : Lecture 1
Question # 2
The address bus is unidirectional and address always travels from processor to memory.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 1
Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Correct Option : 3 From : Lecture 1
Question # 4
Control bus________
1) : is Not Important.
2) : is Important .
3) : bidirectional.
4) : unidirectional .
Correct Option : 3 From : Lecture 1
Question # 5
A memory cell is an n-bit location to store data, normally ________also called a byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Correct Option : 2 From : Lecture 1
Question # 6
The number of bits in a cell is called the cell width.______________ define the memory completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Correct Option : 1 From : Lecture 1
Question # 7
for memory we define two dimensions. The first dimension defines how many __________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Correct Option : 1 From : Lecture 1
Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal
2) : Best and simplest
3) : first
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 9
Control bus is only the mechanism. The responsibility of sending the appropriate signals on the control bus to the memory is of the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 10
In “total: dw 0 ” Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Correct Option : 3 From : Lecture 10
Question # 11
| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 3 From : Lecture 10
Question # 12
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 1 From : Lecture 10
Question # 13
ADC has _________ operands.
1) : two
2) : three
3) : Five
4) : Zero
Correct Option : 2 From : Lecture 10
Question # 14
The basic purpose of a computer is to perform operations, and operations need ____________.
1) : order
2) : nothing
3) : operands
4) : bit
Correct Option : 3 From : Lecture 2
Question # 15
Registers are like a scratch pad ram inside the processor and their operation is very much like normal______________.
1) : Number
2) : opreations
3) : memory cells
4) : None of the Given
Correct Option : 3 From : Lecture 2
Question # 16
There is a central register in every processor called the _______ and The word size of a processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
3) : accumulator, Address Bus
4) : accumulator,memory
Correct Option : 1 From : Lecture 2
Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Correct Option : 2 From : Lecture 2
Question # 18
“The program counter holds the address of the next instruction to be _____________”
1) : executed.
2) : called
3) : deleted
4) : copy
Correct Option : 1 From : Lecture 2
Question # 19
There are _____ types of “instruction groups”
1) : 4
2) : 5
3) : 3
4) : 2
Correct Option : 1 From : Lecture 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 2
Question # 21
“mov” instruction is related to the _______ *****.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Special Instructions
Correct Option : 2 From : Lecture 2
Question # 22
______________allow changing specific processor behaviors and are used to play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Correct Option : 1 From : Lecture 2
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Correct Option : 3 From : Lecture 2
Question # 24
The __________ of a processor means the organization and functionalities of the registers it contains and the instructions that are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
4) : None of the Given
Correct Option : 2 From : Lecture 2
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
4) : None of the Given
Correct Option : 1 From : Lecture 2
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lecture 3
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Correct Option : 1 From : Lecture 3
Question # 28
AX means we are referring to the extended 16bit “A” register. Its upper and lower byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Correct Option : 1 From : Lecture 3
Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Correct Option : 4 From : Lecture 3
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
4) : None of the Given
Correct Option : 2 From : Lecture 3
Question # 31
The D of DX stands for Destination as it acts as the destination in _____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Correct Option : 1 From : Lecture 3
Question # 32
The C of CX stands for Counter as there are certain instructions that work with an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Correct Option : 3 From : Lecture 3
Question # 33
_________are the index registers of the Intel architecture which hold address of data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Correct Option : 4 From : Lecture 3
Question # 34
In Intel IAPX88 architecture ___________ is the special register containing the address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Correct Option : 3 From : Lecture 3
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Correct Option : 1 From : Lecture 3
Question # 36
___________is also a memory pointer containing the address in a special area of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Correct Option : 2 From : Lecture 3
Question # 37
____________is bit wise significant and accordingly each bit is named separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Correct Option : 4 From : Lecture 3
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this extra bit that won’t fit in the target register is placed in the __________where it can be used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Correct Option : 1 From : Lecture 3
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 40
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 41
Operation code “ add ax, bx ” ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Correct Option : 3 From : Lecture 3
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Correct Option : 1 From : Lecture 4
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with _______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Correct Option : 2 From : Lecture 4
Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
4) : None of the Given
Correct Option : 1 From : Lecture 4
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______ four bits zero = 20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Correct Option : 4 From : Lecture 4
Question # 46
When adding two 20bit Addresses a carry if generated is dropped without being stored anywhere and the phenomenon is called address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Correct Option : 1 From : Lecture 4
Question # 47
segments can only be defined a 16byte boundaries called _____________ boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Correct Option : 1 From : Lecture 4
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This is called _____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Correct Option : 2 From : Lecture 4
Question # 49
“db num1” size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
Correct Option : 1 From : Lecture 5
Question # 50
“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx _________________________________
5------------int 0x21
6------------
7------------num1: dw 5
8------------num2: dw 10
Comments for the 4 are :
1) : No comments Will be
2) : ; accumulate sum in add
3) : ; accumulate sum in ax
4) : ; accumulate sum in Bx
Correct Option : 3 From : Lecture 5
Question # 51
In “ mov ax, bx ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 4 From : Lecture 5
Question # 52
In “mov ax, [bx] ” is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Correct Option : 1 From : Lecture 5
Question # 53
In “mov ax, 5 ” is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Correct Option : 1 From : Lecture 6
Question # 54
In “ mov ax, [num1+bx] ” is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Correct Option : 4 From : Lecture 7
Question # 55
“base + offset addressing ” gives This number which came as the result of addition is called the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option : 3 From : Lecture 7
Question # 56
“mov ax, [cs:bx]” associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
4) : None of the Given
Correct Option : 2 From : Lecture 7
Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Correct Option : 2 From : Lecture 7
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
Correct Option : 2 From : Lecture 7
Question # 59
In “ mov [1234], al ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 3 From : Lecture 8
Question # 60
In “ mov [SI], AX ” is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Correct Option : 3 From : Lecture 8
Question # 61
In “ mov ax, [bx - Si] ” is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Correct Option : 4 From : Lecture 8
Question # 62
In “ mov ax, [BL] ” there is error i.e. __________
1) : Address must be 16bit
2) : Address must be 8bit
3) : Address must be 4bit
4) : 8 bit to 16 bit move illegal
Correct Option : 4 From : Lecture 8
Question # 63
In “ mov ax, [SI+DI] ” there is error i.e. __________
1) : Two indexes can’t use as Memory Address
2) : index can’t use as Memory Address
3) : I don't Know
4) : None of the Given
Correct Option : 1 From : Lecture 8
Question # 64
In JNE and JNZ there is difference for only _____________;
1) : Programmer or Logic
2) : Assembler
3) : Debugger
4) : IAPX88
Correct Option : 1 From : Lecture 9
Question # 65
JMP is Instruction that on executing take jump regardless of the state of all flags is called__________
1) : Jump
2) : Conditional jump
3) : Unconditional jump
4) : Stay
Correct Option : 3 From : Lecture 9
Question # 66
When result of the source subtraction from the destination is zero, zero flag is set i.e. ZF=1
its mean that;
1) : DEST = SRC
2) : DEST != SRC
3) : DEST < SRC
4) : DEST > SRC
Correct Option : 1 From : Lecture 9
Question # 67
When an unsigned source is subtracted from an unsigned destination and the destination is smaller, borrow is needed which sets the ____________.
1) : carry flag i.e CF = 0
2) : carry flag i.e CF = 1
3) : Carry Flag + ZF=1
4) : None of the Given
Correct Option : 2 From : Lecture 9
Question # 68
In the case of unassigned source and destination when subtracting and in the result ZF =1 OR CR=1 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST ? USRC
4) : DEST > SRC
Correct Option : 3 From : Lecture 9
Question # 69
In the case of unassigned source and destination when subtracting and in the result ZF =0 AND CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST > USRC
Correct Option : 4 From : Lecture 9
Question # 70
In the case of unassigned source and destination when subtracting and in the result CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST ? USRC
Correct Option : 4 From : Lecture 9
Question # 71
______This jump is taken if the last arithmetic operation produced a zero in its destination. After a CMP it is taken if both operands were equal.
1) : Jump if zero(JZ)/Jump if equal(JE)
2) : Jump if equal(JE)
3) : Jump if zero(JZ)
4) : No Jump fot This
Correct Option : 1 From : Lecture 9
Question # 72
_______This jump is taken after a CMP if the unsigned source is smaller than or equal to the unsigned destination.
1) : JBE(Jump if not below or equal)
2) : JNA(Jump if not above)/JBE(Jump if not below or equal)
3) : JNA(Jump if not above)
4) : No Jump fot This
Correct Option : 2 From : Lecture 9
Question # 1
Numbers of any size can be added using a proper combination of __________.
1) : ADD and ADC
2) : ABD and ADC
3) : ADC and ADC
4) : None of the Given
Correct Option : 1 From : Lecture 11
Question # 2
Like addition with carry there is an instruction to subtract with borrows called____________.
1) : SwB
2) : SBB
3) : SBC
4) : SBBC
Correct Option : 2 From : Lecture 11
Question # 3
if “and ax, bx” instruction is given, There are _____________ operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12
Question # 4
____________can be used to check whether particular bits of a number are set or not.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 1 From : Lecture 12
Question # 5
__________can also be used as a masking operation to invert selective bits.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 3 From : Lecture 12
Question # 6
Masking Operations are Selective Bit ______________________
1) : Clearing, XOR, Inversion and Testing
2) : Clearing, Setting, Inversion and Testing
3) : Clearing, XOR, AND and Testing
4) : None of the Given
Correct Option : 2 From : Lecture 12
Question # 7
The ____________ instruction allows temporary diversion and therefore reusability of code.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 1 From : Lecture 13
Question # 8
CALL takes a label as _____________ and execution starts from that label,
1) : argument
2) : Lable
3) : TXt
4) : Register
Correct Option : 1 From : Lecture 13
Question # 9
When the __________instruction is encountered and it takes execution back to the instruction following the CALL.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 2 From : Lecture 13
Question # 10
_______________________ Both the instructions are commonly used as a pair, however technically they are independent in their operation.
1) : RET and ADC
2) : Cal and SSb
3) : CALL and RET
4) : ADC and SSB
Correct Option : 3 From : Lecture 13
Question # 11
The CALL mechanism breaks the thread of execution and does not change registers, except ____________.
1) : SI
2) : IP
3) : DI
4) : SP
Correct Option : 2 From : Lecture 13
Question # 12
Stack is a ______ that behaves in a first in last out manner.
1) : Program
2) : data structure
3) : Heap
4) : None of the Given
Correct Option : 2 From : Lecture 14
Question # 13
If ____________ is not available, stack clearing by the callee is a complicated process.
1) : CALL
2) : SBB
3) : RET n
4) : None of the Given
Correct Option : 3 From : Lecture 14
Question # 14
When the stack will eventually become full, SP will reach 0, and thereafter wraparound producing unexpected results. This is called stack ________
1) : Overflow
2) : Leakage
3) : Error
4) : Pointer
Correct Option : 1 From : Lecture 14
Question # 15
The pop operation makes a copy from the top of the stack into its_______________.
1) : Register
2) : operand
3) : RET n
4) : Pointer
Correct Option : 2 From : Lecture 14
Question # 16
_______________decrements SP (the stack pointer) by two and then transfers a word from the source operand to the top of stack
1) : PUSH
2) : POP
3) : CALL
4) : RET
Correct Option : 1 From : Lecture 14
Question # 17
POP transfers the word at the current top of stack (pointed to by SP) to the destination operand and then __________ SP by two to point to the new top of stack.
1) : increments
2) : dcrements
3) : ++
4) : --
Correct Option : 1 From : Lecture 14
Question # 18
The trick is to use the ________and ___________operations and save the callers’ value on the stack and recover it from there on return.
1) : POP, ADC
2) : CALL, RET
3) : CALL, RET n
4) : PUSH, POP
Correct Option : 4 From : Lecture 14
Question # 19
To access the arguments from the stack, the immediate idea that strikes is to __________ them off the stack.
1) : PUSH
2) : POP
3) : CALL
4) : Rrgister
Correct Option : 2 From : Lecture 15
Question # 20
push bp
we are ________________
1) : sending bp copy to stack
2) : making bp copy from stack
3) : pushing bp on the stack
4) : doing nothing
Correct Option : 3 From : Lecture 15
Question # 21
Local Variables means variables that are used within the ___________________
1) : Subroutine
2) : Program
3) : CALL
4) : Label
Correct Option : 1 From : Lecture 15
Question # 22
Standard ASCII has 128 characters with assigned numbers from ________.
1) : 1to 129
2) : 0 to 127
3) : 0 to 128
4) : None of the Given
Correct Option : 2 From : Lecture 16
Question # 23
When _______ is sent to the VGA card, it will turn pixels on and off in such a way that a visual representation of ‘A’ appears on the screen.
1) : 0x60
2) : 0x90
3) : 0x30
4) : 0x40
Correct Option : 4 From : Lecture 16
Question # 24
Which bit is refer to the Blinking of foreground character
1) : 6
2) : 7
3) : 5
4) : 3
Correct Option : 2 From : Lecture 16
Question # 25
Which bit is refer to the Intensity component of foreground color
1) : 4
2) : 5
3) : 3
4) : 7
Correct Option : 3 From : Lecture 16
Question # 26
Which bit is refer to the Green component of background color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 2 From : Lecture 16
Question # 27
Which bit is refer to the Green component of foreground color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 1 From : Lecture 16
Question # 28
String can be indicate bye given
1) : db 0x61, 0x61, 0x63
2) : db 'a', 'b', 'c'
3) : db 'abc'
4) : All of the above
Correct Option : 4 From : Lecture 16
Question # 29
The first form divides a 32bit number in DX:AX by its 16bit operand and stores the ___________ quotient in AX
1) : 16bit
2) : 17bit
3) : 32bit
4) : 64bit
Correct Option : 1 From : Lecture 17
Question # 30
The ___________ (division) used in the process is integer division and not floating point division.
1) : DIV instruction
2) : ADC instruction
3) : SSB instruction
4) : DIVI instruction
Correct Option : 1 From : Lecture 17
Question # 31
______________(multiply) performs an unsigned multiplication of the source operand and the accumulator.
1) : Multi
2) : DIV
3) : MUL
4) : Move
Correct Option : 3 From : Lecture 18
Question # 32
The desired location on the screen can be calculated with the following formulae.
1) : location = ( hypos * 80 + SP ) * 3
2) : location = ( hypos * 80 + slocation ) * 2
3) : location = ( hypos * 80 + epos ) * 2
4) : None of the Given
Correct Option : 3 From : Lecture 18
Question # 33
To play with string there are 5 instructions that are __________
1) : STOS, LODS, CMPS, SCAS, and MOVS
2) : MUL, DIV, ADD, ADC and MOVE
3) : SSB, ADD, CMPS, ADC, and MOVS
4) : None of the Given
Correct Option : 1 From : Lecture 18
Question # 34
_______transfers a byte or word from register AL or AX to the string element addressed by ES:DI and updates DI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 2 From : Lecture 18
Question # 35
____________ transfers a byte or word from the source location DS:SI to AL or AX and updates SI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 1 From : Lecture 18
Question # 36
_______compares a source byte or word in register AL or AX with the destination string element addressed by ES: DI and updates the flags.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 3 From : Lecture 18
Question # 37
____________ repeat the following string instruction while the zero flag is set and REPNE or REPNZ repeat the following instruction while the zero flag is not set.
1) : REP or REPZ
2) : REPE or REPZ
3) : REPE or RPZ
4) : RPE or REPZ
Correct Option : 2 From : Lecture 18
Question # 38
LES loads ______________
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 1 From : Lecture 20
Question # 39
LDS loads_______.
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 2 From : Lecture 20
Question # 40
REP allows the instruction to be repeated ____________ times allowing blocks of memory to be copied.
1) : DX
2) : CX
3) : BX
4) : AX
Correct Option : 2 From : Lecture 20
Question # 41
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question # 42
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question # 43
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 44
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
Correct Option : 2 From : Lecture 22
Question # 1
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question # 2
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question # 3
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 4
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
-===========================================================
Question # 1
There are three busses to communicate the processor and memory named
as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Correct Option : 4 From : Lecture 1
Question # 2
The address bus is unidirectional and address always travels from
processor to memory.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 1
Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Correct Option : 3 From : Lecture 1
Question # 4
Control bus________
1) : is Not Important.
2) : is Important .
3) : bidirectional.
4) : unidirectional .
Correct Option : 3 From : Lecture 1
Question # 5
A memory cell is an n-bit location to store data, normally
________also called a byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Correct Option : 2 From : Lecture 1
Question # 6
The number of bits in a cell is called the cell width.______________
define the memory completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Correct Option : 1 From : Lecture 1
Question # 7
for memory we define two dimensions. The first dimension defines how
many __________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Correct Option : 1 From : Lecture 1
Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal
2) : Best and simplest
3) : first
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 9
Control bus is only the mechanism. The responsibility of sending the
appropriate signals on the control bus to the memory is of
the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 10
In “total: dw 0 ” Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Correct Option : 3 From : Lecture 10
Question # 11
| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 3 From : Lecture 10
Question # 12
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 1 From : Lecture 10
Question # 13
ADC has _________ operands.
1) : two
2) : three
3) : Five
4) : Zero
Correct Option : 2 From : Lecture 10
Question # 14
The basic purpose of a computer is to perform operations, and
operations need ____________.
1) : order
2) : nothing
3) : operands
4) : bit
Correct Option : 3 From : Lecture 2
Question # 15
Registers are like a scratch pad ram inside the processor and their
operation is very much like normal______________.
1) : Number
2) : opreations
3) : memory cells
4) : None of the Given
Correct Option : 3 From : Lecture 2
Question # 16
There is a central register in every processor called the _______ and
The word size of a processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
3) : accumulator, Address Bus
4) : accumulator,memory
Correct Option : 1 From : Lecture 2
Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Correct Option : 2 From : Lecture 2
Question # 18
“The program counter holds the address of the next instruction to be
_____________”
1) : executed.
2) : called
3) : deleted
4) : copy
Correct Option : 1 From : Lecture 2
Question # 19
There are _____ types of “instruction groups”
1) : 4
2) : 5
3) : 3
4) : 2
Correct Option : 1 From : Lecture 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 2
Question # 21
“mov” instruction is related to the _______ Group.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Special Instructions
Correct Option : 2 From : Lecture 2
Question # 22
______________allow changing specific processor behaviors and are used
to play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Correct Option : 1 From : Lecture 2
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Correct Option : 3 From : Lecture 2
Question # 24
The __________ of a processor means the organization and
functionalities of the registers it contains and the instructions that
are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
4) : None of the Given
Correct Option : 2 From : Lecture 2
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
4) : None of the Given
Correct Option : 1 From : Lecture 2
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lecture 3
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Correct Option : 1 From : Lecture 3
Question # 28
AX means we are referring to the extended 16bit “A” register. Its
upper and lower byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Correct Option : 1 From : Lecture 3
Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Correct Option : 4 From : Lecture 3
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
4) : None of the Given
Correct Option : 2 From : Lecture 3
Question # 31
The D of DX stands for Destination as it acts as the destination in
_____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Correct Option : 1 From : Lecture 3
Question # 32
The C of CX stands for Counter as there are certain instructions that
work with an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Correct Option : 3 From : Lecture 3
Question # 33
_________are the index registers of the Intel architecture which hold
address of data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Correct Option : 4 From : Lecture 3
Question # 34
In Intel IAPX88 architecture ___________ is the special register
containing the address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Correct Option : 3 From : Lecture 3
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Correct Option : 1 From : Lecture 3
Question # 36
___________is also a memory pointer containing the address in a
special area of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Correct Option : 2 From : Lecture 3
Question # 37
____________is bit wise significant and accordingly each bit is named
separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Correct Option : 4 From : Lecture 3
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this
extra bit that won’t fit in the target register is placed in the
__________where it can be used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Correct Option : 1 From : Lecture 3
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 40
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 41
Operation code “ add ax, bx ” ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Correct Option : 3 From : Lecture 3
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Correct Option : 1 From : Lecture 4
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with
_______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Correct Option : 2 From : Lecture 4
Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
4) : None of the Given
Correct Option : 1 From : Lecture 4
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______
four bits zero = 20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Correct Option : 4 From : Lecture 4
Question # 46
When adding two 20bit Addresses a carry if generated is dropped
without being stored anywhere and the phenomenon is called
address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Correct Option : 1 From : Lecture 4
Question # 47
segments can only be defined a 16byte boundaries called _____________
boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Correct Option : 1 From : Lecture 4
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This
is called _____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Correct Option : 2 From : Lecture 4
Question # 49
“db num1” size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
Correct Option : 1 From : Lecture 5
Question # 50
“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx _________________________________
5------------int 0x21
6------------
7------------num1: dw 5
8------------num2: dw 10
Comments for the 4 are :
1) : No comments Will be
2) : ; accumulate sum in add
3) : ; accumulate sum in ax
4) : ; accumulate sum in Bx
Correct Option : 3 From : Lecture 5
Question # 51
In “ mov ax, bx ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 4 From : Lecture 5
Question # 52
In “mov ax, [bx] ” is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Correct Option : 1 From : Lecture 5
Question # 53
In “mov ax, 5 ” is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Correct Option : 1 From : Lecture 6
Question # 54
In “ mov ax, [num1+bx] ” is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Correct Option : 4 From : Lecture 7
Question # 55
“base + offset addressing ” gives This number which came as the result
of addition is called the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option : 3 From : Lecture 7
Question # 56
“mov ax, [cs:bx]” associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
4) : None of the Given
Correct Option : 2 From : Lecture 7
Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Correct Option : 2 From : Lecture 7
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
Correct Option : 2 From : Lecture 7
Question # 59
In “ mov [1234], al ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 3 From : Lecture 8
Question # 60
In “ mov [SI], AX ” is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Correct Option : 3 From : Lecture 8
Question # 61
In “ mov ax, [bx - Si] ” is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Correct Option : 4 From : Lecture 8
Question # 62
In “ mov ax, [BL] ” there is error i.e. __________
1) : Address must be 16bit
2) : Address must be 8bit
3) : Address must be 4bit
4) : 8 bit to 16 bit move illegal
Correct Option : 4 From : Lecture 8
Question # 63
In “ mov ax, [SI+DI] ” there is error i.e. __________
1) : Two indexes can’t use as Memory Address
2) : index can’t use as Memory Address
3) : I don't Know
4) : None of the Given
Correct Option : 1 From : Lecture 8
Question # 64
In JNE and JNZ there is difference for only _____________;
1) : Programmer or Logic
2) : Assembler
3) : Debugger
4) : IAPX88
Correct Option : 1 From : Lecture 9
Question # 65
JMP is Instruction that on executing take jump regardless of the state
of all flags is called__________
1) : Jump
2) : Conditional jump
3) : Unconditional jump
4) : Stay
Correct Option : 3 From : Lecture 9
Question # 66
When result of the source subtraction from the destination is zero,
zero flag is set i.e. ZF=1
its mean that;
1) : DEST = SRC
2) : DEST != SRC
3) : DEST < SRC
4) : DEST > SRC
Correct Option : 1 From : Lecture 9
Question # 67
When an unsigned source is subtracted from an unsigned destination and
the destination is smaller, borrow is needed which sets the
____________.
1) : carry flag i.e CF = 0
2) : carry flag i.e CF = 1
3) : Carry Flag + ZF=1
4) : None of the Given
Correct Option : 2 From : Lecture 9
Question # 68
In the case of unassigned source and destination when subtracting and
in the result ZF =1 OR CR=1 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST ? USRC
4) : DEST > SRC
Correct Option : 3 From : Lecture 9
Question # 69
In the case of unassigned source and destination when subtracting and
in the result ZF =0 AND CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST > USRC
Correct Option : 4 From : Lecture 9
Question # 70
In the case of unassigned source and destination when subtracting and
in the result CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST ? USRC
Correct Option : 4 From : Lecture 9
Question # 71
______This jump is taken if the last arithmetic operation produced a
zero in its destination. After a CMP it is taken if both operands were
equal.
1) : Jump if zero(JZ)/Jump if equal(JE)
2) : Jump if equal(JE)
3) : Jump if zero(JZ)
4) : No Jump fot This
Correct Option : 1 From : Lecture 9
Question # 72
_______This jump is taken after a CMP if the unsigned source is
smaller than or equal to the unsigned destination.
1) : JBE(Jump if not below or equal)
2) : JNA(Jump if not above)/JBE(Jump if not below or equal)
3) : JNA(Jump if not above)
4) : No Jump fot This
Correct Option : 2 From : Lecture 9
Question # 73
Numbers of any size can be added using a proper combination of __________.
1) : ADD and ADC
2) : ABD and ADC
3) : ADC and ADC
4) : None of the Given
Correct Option : 1 From : Lecture 11
Question # 74
Like addition with carry there is an instruction to subtract with
borrows called____________.
1) : SwB
2) : SBB
3) : SBC
4) : SBBC
Correct Option : 2 From : Lecture 11
Question # 75
if “and ax, bx” instruction is given, There are _____________
operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12
Question # 76
____________can be used to check whether particular bits of a number
are set or not.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 1 From : Lecture 12
Question # 77
__________can also be used as a masking operation to invert selective bits.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 3 From : Lecture 12
Question # 78
Masking Operations are Selective Bit ______________________
1) : Clearing, XOR, Inversion and Testing
2) : Clearing, Setting, Inversion and Testing
3) : Clearing, XOR, AND and Testing
4) : None of the Given
Correct Option : 2 From : Lecture 12
Question # 79
The ____________ instruction allows temporary diversion and therefore
reusability of code.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 1 From : Lecture 13
Question # 80
CALL takes a label as _____________ and execution starts from that label,
1) : argument
2) : Lable
3) : TXt
4) : Register
Correct Option : 1 From : Lecture 13
Question # 81
When the __________instruction is encountered and it takes execution
back to the instruction following the CALL.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 2 From : Lecture 13
Question # 82
_______________________ Both the instructions are commonly used as a
pair, however technically they are independent in their operation.
1) : RET and ADC
2) : Cal and SSb
3) : CALL and RET
4) : ADC and SSB
Correct Option : 3 From : Lecture 13
Question # 83
The CALL mechanism breaks the thread of execution and does not change
registers, except ____________.
1) : SI
2) : IP
3) : DI
4) : SP
Correct Option : 2 From : Lecture 13
Question # 84
Stack is a ______ that behaves in a first in last out manner.
1) : Program
2) : data structure
3) : Heap
4) : None of the Given
Correct Option : 2 From : Lecture 14
Question # 85
If ____________ is not available, stack clearing by the callee is a
complicated process.
1) : CALL
2) : SBB
3) : RET n
4) : None of the Given
Correct Option : 3 From : Lecture 14
Question # 86
When the stack will eventually become full, SP will reach 0, and
thereafter wraparound producing unexpected results. This is called
stack ________
1) : Overflow
2) : Leakage
3) : Error
4) : Pointer
Correct Option : 1 From : Lecture 14
Question # 87
The pop operation makes a copy from the top of the stack into
its_______________.
1) : Register
2) : operand
3) : RET n
4) : Pointer
Correct Option : 2 From : Lecture 14
Question # 88
_______________decrements SP (the stack pointer) by two and then
transfers a word from the source operand to the top of stack
1) : PUSH
2) : POP
3) : CALL
4) : RET
Correct Option : 1 From : Lecture 14
Question # 89
POP transfers the word at the current top of stack (pointed to by SP)
to the destination operand and then __________ SP by two to point to
the new top of stack.
1) : increments
2) : dcrements
3) : ++
4) : --
Correct Option : 1 From : Lecture 14
Question # 90
The trick is to use the ________and ___________operations and save the
callers’ value on the stack and recover it from there on return.
1) : POP, ADC
2) : CALL, RET
3) : CALL, RET n
4) : PUSH, POP
Correct Option : 4 From : Lecture 14
Question # 91
To access the arguments from the stack, the immediate idea that
strikes is to __________ them off the stack.
1) : PUSH
2) : POP
3) : CALL
4) : Rrgister
Correct Option : 2 From : Lecture 15
Question # 92
push bp
we are ________________
1) : sending bp copy to stack
2) : making bp copy from stack
3) : pushing bp on the stack
4) : doing nothing
Correct Option : 3 From : Lecture 15
Question # 93
Local Variables means variables that are used within the ___________________
1) : Subroutine
2) : Program
3) : CALL
4) : Label
Correct Option : 1 From : Lecture 15
Question # 94
Standard ASCII has 128 characters with assigned numbers from ________.
1) : 1to 129
2) : 0 to 127
3) : 0 to 128
4) : None of the Given
Correct Option : 2 From : Lecture 16
Question # 95
When _______ is sent to the VGA card, it will turn pixels on and off
in such a way that a visual representation of ‘A’ appears on the
screen.
1) : 0x60
2) : 0x90
3) : 0x30
4) : 0x40
Correct Option : 4 From : Lecture 16
Question # 96
Which bit is refer to the Blinking of foreground character
1) : 6
2) : 7
3) : 5
4) : 3
Correct Option : 2 From : Lecture 16
Question # 97
Which bit is refer to the Intensity component of foreground color
1) : 4
2) : 5
3) : 3
4) : 7
Correct Option : 3 From : Lecture 16
Question # 98
Which bit is refer to the Green component of background color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 2 From : Lecture 16
Question # 99
Which bit is refer to the Green component of foreground color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 1 From : Lecture 16
Question # 100
String can be indicate bye given
1) : db 0x61, 0x61, 0x63
2) : db 'a', 'b', 'c'
3) : db 'abc'
4) : All of the above
Correct Option : 4 From : Lecture 16
Question # 101
The first form divides a 32bit number in DX:AX by its 16bit operand
and stores the ___________ quotient in AX
1) : 16bit
2) : 17bit
3) : 32bit
4) : 64bit
Correct Option : 1 From : Lecture 17
Question # 102
The ___________ (division) used in the process is integer division and
not floating point division.
1) : DIV instruction
2) : ADC instruction
3) : SSB instruction
4) : DIVI instruction
Correct Option : 1 From : Lecture 17
Question # 103
______________(multiply) performs an unsigned multiplication of the
source operand and the accumulator.
1) : Multi
2) : DIV
3) : MUL
4) : Move
Correct Option : 3 From : Lecture 18
Question # 104
The desired location on the screen can be calculated with the
following formulae.
1) : location = ( hypos * 80 + SP ) * 3
2) : location = ( hypos * 80 + slocation ) * 2
3) : location = ( hypos * 80 + epos ) * 2
4) : None of the Given
Correct Option : 3 From : Lecture 18
Question # 105
To play with string there are 5 instructions that are __________
1) : STOS, LODS, CMPS, SCAS, and MOVS
2) : MUL, DIV, ADD, ADC and MOVE
3) : SSB, ADD, CMPS, ADC, and MOVS
4) : None of the Given
Correct Option : 1 From : Lecture 18
Question # 106
_______transfers a byte or word from register AL or AX to the string
element addressed by ES:DI and updates DI to point to the next
location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 2 From : Lecture 18
Question # 107
____________ transfers a byte or word from the source location DS:SI
to AL or AX and updates SI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 1 From : Lecture 18
Question # 108
_______compares a source byte or word in register AL or AX with the
destination string element addressed by ES: DI and updates the flags.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 3 From : Lecture 18
Question # 109
____________ repeat the following string instruction while the zero
flag is set and REPNE or REPNZ repeat the following instruction while
the zero flag is not set.
1) : REP or REPZ
2) : REPE or REPZ
3) : REPE or RPZ
4) : RPE or REPZ
Correct Option : 2 From : Lecture 18
Question # 110
LES loads ______________
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 1 From : Lecture 20
Question # 111
LDS loads_______.
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 2 From : Lecture 20
Question # 112
REP allows the instruction to be repeated ____________ times allowing
blocks of memory to be copied.
1) : DX
2) : CX
3) : BX
4) : AX
Correct Option : 2 From : Lecture 20
Question # 113
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question # 114
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question # 115
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 116
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
Correct Option : 2 From : Lecture 22
Question # 117
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question #118
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question #119
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 120
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
There are three busses to communicate the processor and memory named
as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Correct Option : 4 From : Lecture 1
Question # 2
The address bus is unidirectional and address always travels from
processor to memory.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 1
Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Correct Option : 3 From : Lecture 1
Question # 4
Control bus________
1) : is Not Important.
2) : is Important .
3) : bidirectional.
4) : unidirectional .
Correct Option : 3 From : Lecture 1
Question # 5
A memory cell is an n-bit location to store data, normally
________also called a byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Correct Option : 2 From : Lecture 1
Question # 6
The number of bits in a cell is called the cell width.______________
define the memory completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Correct Option : 1 From : Lecture 1
Question # 7
for memory we define two dimensions. The first dimension defines how
many __________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Correct Option : 1 From : Lecture 1
Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal
2) : Best and simplest
3) : first
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 9
Control bus is only the mechanism. The responsibility of sending the
appropriate signals on the control bus to the memory is of
the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 10
In “total: dw 0 ” Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Correct Option : 3 From : Lecture 10
Question # 11
| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 3 From : Lecture 10
Question # 12
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 1 From : Lecture 10
Question # 13
ADC has _________ operands.
1) : two
2) : three
3) : Five
4) : Zero
Correct Option : 2 From : Lecture 10
Question # 14
The basic purpose of a computer is to perform operations, and
operations need ____________.
1) : order
2) : nothing
3) : operands
4) : bit
Correct Option : 3 From : Lecture 2
Question # 15
Registers are like a scratch pad ram inside the processor and their
operation is very much like normal______________.
1) : Number
2) : opreations
3) : memory cells
4) : None of the Given
Correct Option : 3 From : Lecture 2
Question # 16
There is a central register in every processor called the _______ and
The word size of a processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
3) : accumulator, Address Bus
4) : accumulator,memory
Correct Option : 1 From : Lecture 2
Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Correct Option : 2 From : Lecture 2
Question # 18
“The program counter holds the address of the next instruction to be
_____________”
1) : executed.
2) : called
3) : deleted
4) : copy
Correct Option : 1 From : Lecture 2
Question # 19
There are _____ types of “instruction groups”
1) : 4
2) : 5
3) : 3
4) : 2
Correct Option : 1 From : Lecture 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 2
Question # 21
“mov” instruction is related to the _______ Group.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Special Instructions
Correct Option : 2 From : Lecture 2
Question # 22
______________allow changing specific processor behaviors and are used
to play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Correct Option : 1 From : Lecture 2
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Correct Option : 3 From : Lecture 2
Question # 24
The __________ of a processor means the organization and
functionalities of the registers it contains and the instructions that
are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
4) : None of the Given
Correct Option : 2 From : Lecture 2
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
4) : None of the Given
Correct Option : 1 From : Lecture 2
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lecture 3
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Correct Option : 1 From : Lecture 3
Question # 28
AX means we are referring to the extended 16bit “A” register. Its
upper and lower byte are separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Correct Option : 1 From : Lecture 3
Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Correct Option : 4 From : Lecture 3
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
4) : None of the Given
Correct Option : 2 From : Lecture 3
Question # 31
The D of DX stands for Destination as it acts as the destination in
_____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Correct Option : 1 From : Lecture 3
Question # 32
The C of CX stands for Counter as there are certain instructions that
work with an automatic count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Correct Option : 3 From : Lecture 3
Question # 33
_________are the index registers of the Intel architecture which hold
address of data and used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Correct Option : 4 From : Lecture 3
Question # 34
In Intel IAPX88 architecture ___________ is the special register
containing the address of the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Correct Option : 3 From : Lecture 3
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Correct Option : 1 From : Lecture 3
Question # 36
___________is also a memory pointer containing the address in a
special area of memory called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Correct Option : 2 From : Lecture 3
Question # 37
____________is bit wise significant and accordingly each bit is named
separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Correct Option : 4 From : Lecture 3
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this
extra bit that won’t fit in the target register is placed in the
__________where it can be used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Correct Option : 1 From : Lecture 3
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 40
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 41
Operation code “ add ax, bx ” ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Correct Option : 3 From : Lecture 3
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Correct Option : 1 From : Lecture 4
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with
_______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Correct Option : 2 From : Lecture 4
Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
4) : None of the Given
Correct Option : 1 From : Lecture 4
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______
four bits zero = 20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Correct Option : 4 From : Lecture 4
Question # 46
When adding two 20bit Addresses a carry if generated is dropped
without being stored anywhere and the phenomenon is called
address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Correct Option : 1 From : Lecture 4
Question # 47
segments can only be defined a 16byte boundaries called _____________
boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Correct Option : 1 From : Lecture 4
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This
is called _____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Correct Option : 2 From : Lecture 4
Question # 49
“db num1” size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
Correct Option : 1 From : Lecture 5
Question # 50
“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx _________________________________
5------------int 0x21
6------------
7------------num1: dw 5
8------------num2: dw 10
Comments for the 4 are :
1) : No comments Will be
2) : ; accumulate sum in add
3) : ; accumulate sum in ax
4) : ; accumulate sum in Bx
Correct Option : 3 From : Lecture 5
Question # 51
In “ mov ax, bx ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 4 From : Lecture 5
Question # 52
In “mov ax, [bx] ” is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Correct Option : 1 From : Lecture 5
Question # 53
In “mov ax, 5 ” is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Correct Option : 1 From : Lecture 6
Question # 54
In “ mov ax, [num1+bx] ” is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Correct Option : 4 From : Lecture 7
Question # 55
“base + offset addressing ” gives This number which came as the result
of addition is called the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option : 3 From : Lecture 7
Question # 56
“mov ax, [cs:bx]” associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
4) : None of the Given
Correct Option : 2 From : Lecture 7
Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Correct Option : 2 From : Lecture 7
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
Correct Option : 2 From : Lecture 7
Question # 59
In “ mov [1234], al ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 3 From : Lecture 8
Question # 60
In “ mov [SI], AX ” is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Correct Option : 3 From : Lecture 8
Question # 61
In “ mov ax, [bx - Si] ” is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Correct Option : 4 From : Lecture 8
Question # 62
In “ mov ax, [BL] ” there is error i.e. __________
1) : Address must be 16bit
2) : Address must be 8bit
3) : Address must be 4bit
4) : 8 bit to 16 bit move illegal
Correct Option : 4 From : Lecture 8
Question # 63
In “ mov ax, [SI+DI] ” there is error i.e. __________
1) : Two indexes can’t use as Memory Address
2) : index can’t use as Memory Address
3) : I don't Know
4) : None of the Given
Correct Option : 1 From : Lecture 8
Question # 64
In JNE and JNZ there is difference for only _____________;
1) : Programmer or Logic
2) : Assembler
3) : Debugger
4) : IAPX88
Correct Option : 1 From : Lecture 9
Question # 65
JMP is Instruction that on executing take jump regardless of the state
of all flags is called__________
1) : Jump
2) : Conditional jump
3) : Unconditional jump
4) : Stay
Correct Option : 3 From : Lecture 9
Question # 66
When result of the source subtraction from the destination is zero,
zero flag is set i.e. ZF=1
its mean that;
1) : DEST = SRC
2) : DEST != SRC
3) : DEST < SRC
4) : DEST > SRC
Correct Option : 1 From : Lecture 9
Question # 67
When an unsigned source is subtracted from an unsigned destination and
the destination is smaller, borrow is needed which sets the
____________.
1) : carry flag i.e CF = 0
2) : carry flag i.e CF = 1
3) : Carry Flag + ZF=1
4) : None of the Given
Correct Option : 2 From : Lecture 9
Question # 68
In the case of unassigned source and destination when subtracting and
in the result ZF =1 OR CR=1 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST ? USRC
4) : DEST > SRC
Correct Option : 3 From : Lecture 9
Question # 69
In the case of unassigned source and destination when subtracting and
in the result ZF =0 AND CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST > USRC
Correct Option : 4 From : Lecture 9
Question # 70
In the case of unassigned source and destination when subtracting and
in the result CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST ? USRC
Correct Option : 4 From : Lecture 9
Question # 71
______This jump is taken if the last arithmetic operation produced a
zero in its destination. After a CMP it is taken if both operands were
equal.
1) : Jump if zero(JZ)/Jump if equal(JE)
2) : Jump if equal(JE)
3) : Jump if zero(JZ)
4) : No Jump fot This
Correct Option : 1 From : Lecture 9
Question # 72
_______This jump is taken after a CMP if the unsigned source is
smaller than or equal to the unsigned destination.
1) : JBE(Jump if not below or equal)
2) : JNA(Jump if not above)/JBE(Jump if not below or equal)
3) : JNA(Jump if not above)
4) : No Jump fot This
Correct Option : 2 From : Lecture 9
Question # 73
Numbers of any size can be added using a proper combination of __________.
1) : ADD and ADC
2) : ABD and ADC
3) : ADC and ADC
4) : None of the Given
Correct Option : 1 From : Lecture 11
Question # 74
Like addition with carry there is an instruction to subtract with
borrows called____________.
1) : SwB
2) : SBB
3) : SBC
4) : SBBC
Correct Option : 2 From : Lecture 11
Question # 75
if “and ax, bx” instruction is given, There are _____________
operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12
Question # 76
____________can be used to check whether particular bits of a number
are set or not.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 1 From : Lecture 12
Question # 77
__________can also be used as a masking operation to invert selective bits.
1) : AND
2) : OR
3) : XOR
4) : NOT
Correct Option : 3 From : Lecture 12
Question # 78
Masking Operations are Selective Bit ______________________
1) : Clearing, XOR, Inversion and Testing
2) : Clearing, Setting, Inversion and Testing
3) : Clearing, XOR, AND and Testing
4) : None of the Given
Correct Option : 2 From : Lecture 12
Question # 79
The ____________ instruction allows temporary diversion and therefore
reusability of code.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 1 From : Lecture 13
Question # 80
CALL takes a label as _____________ and execution starts from that label,
1) : argument
2) : Lable
3) : TXt
4) : Register
Correct Option : 1 From : Lecture 13
Question # 81
When the __________instruction is encountered and it takes execution
back to the instruction following the CALL.
1) : CALL
2) : RET
3) : AND
4) : XOR
Correct Option : 2 From : Lecture 13
Question # 82
_______________________ Both the instructions are commonly used as a
pair, however technically they are independent in their operation.
1) : RET and ADC
2) : Cal and SSb
3) : CALL and RET
4) : ADC and SSB
Correct Option : 3 From : Lecture 13
Question # 83
The CALL mechanism breaks the thread of execution and does not change
registers, except ____________.
1) : SI
2) : IP
3) : DI
4) : SP
Correct Option : 2 From : Lecture 13
Question # 84
Stack is a ______ that behaves in a first in last out manner.
1) : Program
2) : data structure
3) : Heap
4) : None of the Given
Correct Option : 2 From : Lecture 14
Question # 85
If ____________ is not available, stack clearing by the callee is a
complicated process.
1) : CALL
2) : SBB
3) : RET n
4) : None of the Given
Correct Option : 3 From : Lecture 14
Question # 86
When the stack will eventually become full, SP will reach 0, and
thereafter wraparound producing unexpected results. This is called
stack ________
1) : Overflow
2) : Leakage
3) : Error
4) : Pointer
Correct Option : 1 From : Lecture 14
Question # 87
The pop operation makes a copy from the top of the stack into
its_______________.
1) : Register
2) : operand
3) : RET n
4) : Pointer
Correct Option : 2 From : Lecture 14
Question # 88
_______________decrements SP (the stack pointer) by two and then
transfers a word from the source operand to the top of stack
1) : PUSH
2) : POP
3) : CALL
4) : RET
Correct Option : 1 From : Lecture 14
Question # 89
POP transfers the word at the current top of stack (pointed to by SP)
to the destination operand and then __________ SP by two to point to
the new top of stack.
1) : increments
2) : dcrements
3) : ++
4) : --
Correct Option : 1 From : Lecture 14
Question # 90
The trick is to use the ________and ___________operations and save the
callers’ value on the stack and recover it from there on return.
1) : POP, ADC
2) : CALL, RET
3) : CALL, RET n
4) : PUSH, POP
Correct Option : 4 From : Lecture 14
Question # 91
To access the arguments from the stack, the immediate idea that
strikes is to __________ them off the stack.
1) : PUSH
2) : POP
3) : CALL
4) : Rrgister
Correct Option : 2 From : Lecture 15
Question # 92
push bp
we are ________________
1) : sending bp copy to stack
2) : making bp copy from stack
3) : pushing bp on the stack
4) : doing nothing
Correct Option : 3 From : Lecture 15
Question # 93
Local Variables means variables that are used within the ___________________
1) : Subroutine
2) : Program
3) : CALL
4) : Label
Correct Option : 1 From : Lecture 15
Question # 94
Standard ASCII has 128 characters with assigned numbers from ________.
1) : 1to 129
2) : 0 to 127
3) : 0 to 128
4) : None of the Given
Correct Option : 2 From : Lecture 16
Question # 95
When _______ is sent to the VGA card, it will turn pixels on and off
in such a way that a visual representation of ‘A’ appears on the
screen.
1) : 0x60
2) : 0x90
3) : 0x30
4) : 0x40
Correct Option : 4 From : Lecture 16
Question # 96
Which bit is refer to the Blinking of foreground character
1) : 6
2) : 7
3) : 5
4) : 3
Correct Option : 2 From : Lecture 16
Question # 97
Which bit is refer to the Intensity component of foreground color
1) : 4
2) : 5
3) : 3
4) : 7
Correct Option : 3 From : Lecture 16
Question # 98
Which bit is refer to the Green component of background color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 2 From : Lecture 16
Question # 99
Which bit is refer to the Green component of foreground color
1) : 1
2) : 5
3) : 3
4) : 7
Correct Option : 1 From : Lecture 16
Question # 100
String can be indicate bye given
1) : db 0x61, 0x61, 0x63
2) : db 'a', 'b', 'c'
3) : db 'abc'
4) : All of the above
Correct Option : 4 From : Lecture 16
Question # 101
The first form divides a 32bit number in DX:AX by its 16bit operand
and stores the ___________ quotient in AX
1) : 16bit
2) : 17bit
3) : 32bit
4) : 64bit
Correct Option : 1 From : Lecture 17
Question # 102
The ___________ (division) used in the process is integer division and
not floating point division.
1) : DIV instruction
2) : ADC instruction
3) : SSB instruction
4) : DIVI instruction
Correct Option : 1 From : Lecture 17
Question # 103
______________(multiply) performs an unsigned multiplication of the
source operand and the accumulator.
1) : Multi
2) : DIV
3) : MUL
4) : Move
Correct Option : 3 From : Lecture 18
Question # 104
The desired location on the screen can be calculated with the
following formulae.
1) : location = ( hypos * 80 + SP ) * 3
2) : location = ( hypos * 80 + slocation ) * 2
3) : location = ( hypos * 80 + epos ) * 2
4) : None of the Given
Correct Option : 3 From : Lecture 18
Question # 105
To play with string there are 5 instructions that are __________
1) : STOS, LODS, CMPS, SCAS, and MOVS
2) : MUL, DIV, ADD, ADC and MOVE
3) : SSB, ADD, CMPS, ADC, and MOVS
4) : None of the Given
Correct Option : 1 From : Lecture 18
Question # 106
_______transfers a byte or word from register AL or AX to the string
element addressed by ES:DI and updates DI to point to the next
location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 2 From : Lecture 18
Question # 107
____________ transfers a byte or word from the source location DS:SI
to AL or AX and updates SI to point to the next location.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 1 From : Lecture 18
Question # 108
_______compares a source byte or word in register AL or AX with the
destination string element addressed by ES: DI and updates the flags.
1) : LODS
2) : STOS
3) : SCAS
4) : MOVE
Correct Option : 3 From : Lecture 18
Question # 109
____________ repeat the following string instruction while the zero
flag is set and REPNE or REPNZ repeat the following instruction while
the zero flag is not set.
1) : REP or REPZ
2) : REPE or REPZ
3) : REPE or RPZ
4) : RPE or REPZ
Correct Option : 2 From : Lecture 18
Question # 110
LES loads ______________
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 1 From : Lecture 20
Question # 111
LDS loads_______.
1) : ES
2) : DS
3) : PS
4) : LS
Correct Option : 2 From : Lecture 20
Question # 112
REP allows the instruction to be repeated ____________ times allowing
blocks of memory to be copied.
1) : DX
2) : CX
3) : BX
4) : AX
Correct Option : 2 From : Lecture 20
Question # 113
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question # 114
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question # 115
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 116
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
Correct Option : 2 From : Lecture 22
Question # 117
___________pops IP, then CS, and then FLAGS.
1) : Ret n
2) : REZA
3) : REPE
4) : IRET
Correct Option : 4 From : Lecture 21
Question #118
________ , Trap, Single step Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 2 From : Lecture 21
Question #119
_________,NMI-Non Maskable Interrupt
1) : INT 0
2) : INT 1
3) : INT 3
4) : INT 0
Correct Option : 3 From : Lecture 21
Question # 120
To hook an interrupt we change the _________ corresponding to that interrupt.
1) : SX
2) : vector
3) : AX
4) : BX
1. Assembly language is not a low level language.
a. True
b. False
2. In case of COM File first command parameter is stored at ______ offset of program
segment prefix.
a. 0x80 (Not Confirm)
b. 0x82
c. 0x84
d. 0x86
3. Address always goes from
a. Processor to meory
b. Memory to processor
c. Memory to memory
d. None of the above
4. The sourse register in OUT is
a. AL or AX
b. BL or BX
c. CL or CX
d. DL or DX
5. By default CS is associated with
a. SS
b. BP
c. CX
d. IP
6. Which of the following pins of parallel port are grounded
a. 10-18
b. 18-25
c. 25-32
d. 32-39
7. In the instruction mov word [es:160], 0x1230, 30 represents the character
a. A
b. B
c. 0
d. 1
8. On executing 0x21 0x3D, if file cant be opened then
a. CF will contain 1
b. CF will contain 0
c. ZF will contain 1
d. ZF will contain 0
9. Which of the following IRQ is cascading interrupt
a. IRQ 0
b. IRQ 1
c. IRQ 2
d. IRQ 3
10. The execution of instruction mov word [es:160], 0x1230, will print a character on the
screen at
a. First column of second row
b. Second column of first row
c. Second column of second row
d. First column of third row
======================================
1)))SHR and SAL are same?
.True (correct)
.False
2)))mov ax,0 will set ZF flag
.True
.False
3)))In 9 pin DB connector ,which pic is assigned to TD.
. 1
. 2
. 3(correct)
. 4
4)))Lower 16 bits of EAX are labeled as
. AX(correct)
. BX
.EAX
.none of above
5))) which is the special prefix used for repeating a block
.rep(correct)
.repeat
.repb
.repe
6)) JA can not after cmp if unsigned destinition is greater than
source
.true
.false
.True (correct)
.False
2)))mov ax,0 will set ZF flag
.True
.False
3)))In 9 pin DB connector ,which pic is assigned to TD.
. 1
. 2
. 3(correct)
. 4
4)))Lower 16 bits of EAX are labeled as
. AX(correct)
. BX
.EAX
.none of above
5))) which is the special prefix used for repeating a block
.rep(correct)
.repeat
.repb
.repe
6)) JA can not after cmp if unsigned destinition is greater than
source
.true
.false
Q=1
Conditional jump can only:
1. Far
2. short
3. near
4. all of the given
q=2:
Address is always go from:
1. Processor to memory
2. Memory to processor
3. Memory to memory
4. None of given
Q=3;
Programmable interrupt controllers have two ports 20 and 21……port 20 is a control port while port 21 is ………..
1. The interrupt make register
2. Interrupt port
3. Output port
4. Input port
Q=4:
In the instruction “move word[es:160],0x1230 represent the charechter…………
1. A
2. B
3. 0
4. 1
Q=5:
The 8088 processor divides interrupts into how many classes?
1. 2
2. 3
3. 4
4. 5
Q=6:
Which of the following is the pair of register used to access memory in string instruction?
1. DI and BP
2. SI and BP
3. DI and SI
4. DS and SI
Q=7:
In case of COM file,first command line parameter is stored at ………..offset of program segment prefix’
1. 0x80
2. 0x82
3. 0x84
4. 0x86
Q=8:
The INT 0x13 service 0x03 is use to …
1. Read disk sector
2. Write disk sector
3. Reset disk sector
4. Get drive parameters
Q=9:
After the execution of STOSWB,the CX wil be……..
1. Incremented by 1
2. Incremented by 2
3. Decremented by 1
4. Decremented by 2
Q=10
The execution of the instruction “mov word [ES:160],0x1230”will print a character on the screen at:
1. First column of second row
2. Second column of first row
3. Second column of second row
4. First column of third row
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